Iris-030 SDR Platform

50 – 3800 MHz Iris® 2T x 2R Software-Defined Radio (SDR) Module with MIMO Bus.

SKU IRIS-030 Category

Iris-030 is part of the Iris family of software-defined radio (SDR) modules designed to support coherent real-time wireless Multiple-In Multiple-Out (MIMO) operation with hundreds of coherent digital radio chains. The unique modular design of Iris draws on years of massive MIMO research, enabling scalable systems with minimal cabling.

Iris-030 integrates field-programmable RF (FPRF) transceivers with a Xilinx system-on-chip (SoC) field-programmable gate array (FPGA) that provides digital logic and dualcore ARM A9 processors sufficient for implementing a wide range of custom or standard-based wireless radio protocols. No other SDR platform fits as many radios in such a small, affordable form factor, which is also why researchers choose Iris-030 units for drone-based radio research.

Built around the SoapySDR open-source application framework for streaming or buffer-based SDR radio streams, the Iris-030 interoperates with other SDR platforms and frameworks like GNURadio, OpenAirInterface, and Pothos. The permissive open-source software ecosystem makes Iris-030 a great solution for both academics and businesses alike.

Additional features, such as flexible power and data options, a carrier-grade all-programmable clocking architecture, and high-speed data/clocking interconnects make Iris-030 a powerful stand-alone platform for implementing next-generation wireless systems.


  • Rapid prototyping for 5G/6G MIMO systems
  • Smart grid research
  • Smart agriculture/AgTech
  • Asset tracking and IoT
  • Signal intelligence
  • Directional tracking & localization
  • Array signal processing
Weight 0.75 kg
Dimensions 18.17 × 3.94 × 1.86 cm

50 – 3700 MHz

Channel Bandwidth

Up to 61.44 MHz MIMO
Up to 122.88 MHz SISO
Typical: 40 MHz

Duplex Mode

2T x 2R Time Division Duplex
2T x 2R Frequency Division Duplex

Output Power

Maximum 0 dBm across frequency range

Available Gain

70 dB available transmit gain range
65 dB available receive gain range


RJ45 10/100/1000 802.3at Power-over-Ethernet (PoE+)
1x IRIS MIMO bus downstream connector
1x IRIS MIMO bus upstream connector
12 VDC barrel plug
1x u.fl auxiliary output clock
MicroSD cage
14-pin JTAG connector

Power Requirements

5 – 10 W maximum standalone @ 48 VDC or 12 VDC
25 W maximum with Skylark analog front-end

Programmable Logic

Xilinx Zynq xc7z030 System-on-Chip FPGA


667 MHz – 1 GHz dual-core ARM A9


Up to 1 GB DDR3 RAM
Up to 512 kB non-volatile flash
MicroSD card slot


100 ppb Stratum 3 MEMS TCXO reference with digital pulling control
Low 90 fs rms jitter any-input clock recovery